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19-1811; Rev 1; 8/01
KIT ATION EVALU ILABLE AVA
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
General Description Features
o Dual, High-Efficiency, Synchronous Rectified Step-Down Converter o Main Power Adjustable from +1.25V to +5.5V Over 2A Load Current Up to 95% Efficiency o Core Power Adjustable from 1V to 5V Internal Switches Up to 1.5A Load Current Up to 92% Efficiency o 100% (max) Duty Cycle o Up to 1.25MHz Switching Frequency o Input Voltage Range from +2.7V to +28V o 170A Quiescent Current o 5A Shutdown Current o Digital Soft-Start o Independent Shutdown Inputs
MAX1775
The MAX1775 is a dual, step-down DC-DC converter that generates both the main (+3.3V at over 2A) and core (+1.8V at up to 1.5A) supplies for a complete power solution for PDAs, subnotebooks, and other hand-held devices. The main output is adjustable from +1.25V to +5.5V. The core output is adjustable from 1V to 5V. Both switching converters operate at up to 1.25MHz for small external components and use synchronous rectifiers to achieve efficiencies up to 95%. Operation with up to 100% duty cycle provides the lowest possible dropout voltage to extend useful battery life. The MAX1775 accepts inputs from +2.7V up to +28V, allowing use with many popular battery configurations as well as AC-DC wall adapters. Digital soft-start reduces battery current surges at power-up. Both the main and core converters have separate shutdown inputs. The MAX1775 comes in a small 16-pin QSOP package. The MAX1775 evaluation kit is available to help reduce design time.
Ordering Information ________________________Applications
Hand-Held Computers PDAs Internet Access Tablets POS Terminals Subnotebooks
IN 2.7V TO 5.5V (28V IN CASCADE)
PART MAX1775EEE
TEMP. RANGE -40C to +85C
PIN-PACKAGE 16 QSOP
Typical Operating Circuit
IN
Pin Configuration
TOP VIEW
SHDNM 1 SHDNC 2 PGND 3 NDRV 4 CVL 5 IN 6 PDRV 7 CVH 8 16 LXC
ON ON
CVH INC PDRV
OFF OFF
SHDNM SHDNC NDRV CVL MAIN 3.3V OVER 2A
15 INC 14 GND
REF MAX1775 CS+ CSFBM PGND GND LXC CORE 1.8V 1.5A
MAX1775
13 FBC 12 CS11 CS+ 10 FBM 9 REF
FBC
16 QSOP ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
ABSOLUTE MAXIMUM RATINGS
IN, SHDNM, CVH to GND.......................................-0.3V to +30V IN to CVH, PDRV ......................................................-0.3V to +6V PDRV to GND..................................(VCVH - 0.3V) to (VIN + 0.3V) PGND to GND .......................................................-0.3V to +0.3V All Other Pins to GND...............................................-0.3V to +6V Core Output Short Circuit...........................................Continuous Continuous Power Dissipation 16-Pin QSOP (derate 7.1mW/C above +70C)..........571mW Operating Temperature .......................................-40C to +85C Storage Temperature.........................................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Input Voltage Input Quiescent Supply Current CS- Quiescent Supply Current Core Regulator Quiescent Supply Current IN Shutdown Supply Current MAIN REGULATOR Main Output Voltage Adjust Range FBM Regulation Threshold FBM Input Current Current-Limit Threshold Minimum Current-Limit Threshold Valley Current Threshold Zero Current Threshold PDRV, NDRV Gate Drive Resistance CS- to CVL Switch Resistance PDRV, NDRV Dead Time Maximum Duty Cycle Minimum On-Time Minimum Off-Time 100 200 200 400 400 650 650 1.25 VFBM IFBM VCLM VMIN VVALLEY VZERO V(CS+ - CS-) = 0 to +60mV, VIN = +2.7V to +28V VFBM = +1.3V VCS+ - VCSVCS+ - VCSVCS+ - VCSVCS+ - VCSVCS- = +3.3V, ILOAD = 50mA ICVL = 50mA 1.21 -0.1 60 6 40 0 2 4.5 50 80 15 50 1.25 5.5 1.29 0.1 100 24 60 15 4.4 8 V V A mV mV mV mV ns % ns ns SYMBOL VIN IIN ICSIINC VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V SHDNM = SHDNC = GND CONDITIONS MIN 2.7 15 110 60 5 TYP MAX 28 30 220 120 30 UNITS V A A A A
2
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER CORE REGULATOR Input Voltage Range INC Undervoltage Lockout Core Output Voltage Adjust Range Maximum Core Load Current FBC Regulation Threshold FBC Input Current Dropout Voltage (INC to LXC) LXC Leakage Current LXC P-Channel, N-Channel On-Resistance LXC P-Channel Current Limit LXC P-Channel Minimum Current LXC N-Channel Valley Current LXC N-Channel Zero-Crossing Current LXC Dead Time Maximum Duty Cycle Minimum On-Time Minimum Off-Time REFERENCE Reference Voltage Reference Load Regulation Reference Line Regulation Reference Sink Current CVL, CVH REGULATORS CVL Output Voltage CVL Switchover Threshold CVH Output Voltage CVH Switchover Threshold CVL Undervoltage Lockout VCVH VIN VCVL ICVL = 50mA, VIN = +2.7V, VCS- = 0 ICVL = 50mA, VCS- = +3.3V VCS- rising, hysteresis = 100mV (typ) VIN = +4V, ICVH = 25mA VIN = +12V, ICVH = 50mA VIN rising, hysteresis = 350mV (typ) VCVL rising VCVL falling 2.40 2.30 2.40 2.6 2.8 3.2 2.47 2.55 VIN - 3.4 VIN - 2.8 VIN - 4.3 VIN - 3.7 5.5 2.47 2.37 2.55 2.45 3.1 V V V V V IREF VREF IREF = 0 to 50A VCS- = +2.5V to +5.5V, IREF = 50A 10 1.23 1.25 1.27 10 5 V mV mV A 100 170 170 400 400 670 670 ICLC 1200 100 900 40 ILXC VFBC IFBC (Note 1) VINC = +2.5 to +5.5V, IOUTC = 0 to 200mA VFBC = +1.3V IOUTC = 400mA VINC = +5.5V, VLXC = 0 to +5.5V -10 0.25 1800 200 1400 110 50 VINC VINC rising VINC falling 2.6 2.40 2.30 1.0 1 0.97 -0.1 0.1 1.5 1.0 1.03 0.1 0.25 10 0.5 3000 400 2400 170 2.47 2.37 5.5 2.55 2.45 5.0 V V V A V A V A mA mA mA mA ns % ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1775
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3
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER LOGIC INPUTS SHDNM, SHDNC Input Low Voltage SHDNM, SHDNC Input High Voltage SHDNM, SHDNC Input Low Current SHDNC Input High Current SHDNM Input High Current SHDNM = SHDNC = GND V SHDNC = +5.5V V SHDNM = +5V V SHDNM = +28V 2 15 30 2.0 -1 1 5 0.4 V V A A A SYMBOL CONDITIONS MIN TYP MAX UNITS
ELECTRICAL CHARACTERISTICS
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER Input Voltage Input Quiescent Supply Current CS- Quiescent Supply Current Core Regulator Quiescent Supply Current IN Shutdown Supply Current MAIN REGULATOR Main Output Voltage Adjust Range FBM Regulation Threshold FBM Input Current Current-Limit Threshold Minimum Current-Limit Threshold Valley Current Threshold Zero Current Threshold PDRV, NDRV Gate Drive Resistance CS- to CVL Switch Resistance VFBM IFBM VCL V(CS+ - CS-) = 0 to +60mV, VIN = +2.7V to +28V VFBM = +1.3V VCS+ - VCSVCS+ - VCSVCS+ - VCSVCS+ - VCSVCS- = +3.3V ICVL = 50mA 1.25 1.21 -0.1 60 6 40 0 5.5 1.29 0.1 100 24 60 15 4.4 8 V V A mV mV mV mV SYMBOL VIN IIN ICSIINC VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V VFBM = +1.5V, VFBC = +1.5V, V SHDNM = V SHDNC = +3.3V SHDNM = SHDNC = GND CONDITIONS MIN 2.7 MAX 28 30 220 120 30 UNITS V A A A A
4
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER Maximum Duty Cycle Minimum On-Time Minimum Off-Time CORE REGULATOR Input Voltage Range INC Undervoltage Lockout Core Output Voltage Adjust Range Maximum Core Load Current FBC Regulation Threshold FBC Input Current Dropout Voltage (INC to LXC) LXC Leakage Current LXC P-Channel, N-Channel On-Resistance LXC P-Channel Current Limit LXC P-Channel Minimum Current LXC N-Channel Valley Current LXC N-Channel Zero-Crossing Current Maximum Duty Cycle Minimum On-Time Minimum Off-Time REFERENCE Reference Voltage Reference Load Regulation Reference Line Regulation Reference Sink Current CVL, CVH REGULATORS CVL Output Voltage CVH Output Voltage CVL Undervoltage Lockout VCVL VCVH ICVL = 50mA, VIN = +2.7V, VCS- = 0 VIN = +4V, ICVH = 25mA VIN = +12V, ICVH = 50mA VCVL rising VCVL falling 2.40 2.30 2.6 3.1 VIN - 2.8 VIN - 3.7 2.55 2.45 V V V IREF VREF IREF = 0 to 50A VCS- = +2.5V to +5.5V, IREF = 50A 10 1.22 1.27 10 5 V mV mV A 1200 100 880 35 100 150 150 670 670 ILXC VFBC IFBC (Note 1) VINC = +2.5V to +5.5V, IOUTC = 0 to 200mA VFBC = +1.3V IOUTC = 400mA VINC = +5.5V, VLXC = 0 to +5.5V -10 VINC VINC rising VINC falling 2.6 2.39 2.29 1.0 1 0.97 -0.1 1.03 0.1 0.2 10 0.5 3050 400 2450 175 5.5 2.55 2.45 5.0 V V V A V A V A mA mA mA mA % ns ns SYMBOL CONDITIONS MIN 100 200 200 650 650 MAX UNITS % ns ns
MAX1775
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5
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V, VMAIN = VINC = VCS- = VCS+ = +3.3V, VCORE = +1.8V, Circuit of Figure 4, TA -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER LOGIC INPUTS SHDNM, SHDNC Input Low Voltage SHDNM, SHDNC Input High Voltage SHDNM, SHDNC Input Low Current SHDNC Input High Current SHDNM Input High Current SHDNM = SHDNC = GND V SHDNC = +5.5V V SHDNM = +28V 2.0 -1 1 5 30 0.4 V V A A A SYMBOL CONDITIONS MIN MAX UNITS
Note 1: This parameter is guaranteed based on the LXC P-channel current limit and the LXC N-channel valley current. Note 2: Specifications to -40C are guaranteed by design and not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25C, unless otherwise noted.)
MAIN OUTPUT EFFICIENCY vs. LOAD
MAX1775 toc01
CORE OUTPUT EFFICIENCY vs. LOAD
MAX1775 toc02
VREF ACCURACY vs. TEMPERATURE
1.5 1.0
MAX1775 toc03
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0
VIN = +3.3V
VINC = +2.7V
2.0
VINC = +5V
VREF ACCURACY (%) 1000
V = +15V VIN = +18V VIN = +12V IN VIN = +5V
VINC = +3.3V
0.5 0 -0.5 -1.0 -1.5 -2.0
1
10
100 LOAD (mA)
1000
10,000
1
10 LOAD (mA)
100
-40
-15
10
35
60
85
TEMPERATURE (C)
6
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25C, unless otherwise noted.)
MAIN SWITCHING WAVEFORMS, LIGHT LOAD (100mA)
MAX1775 toc05
MAX1775
REFERENCE LOAD REGULATION
-0.2 -0.4 VREF ACCURACY (%) -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 0 10 20 30 40 IREF (A) 50 60 70 80
MAX1775 toc04
0
LX 5V/div
ILM 500mA/div VMAIN (AC-COUPLED) 20mV/div 1s/div
MAIN SWITCHING WAVEFORMS, HEAVY LOAD (1A)
MAX1775 toc06
CORE SWITCHING WAVEFORMS, LIGHT LOAD (50mA)
MAX1775 toc07
LX 5V/div
LX 5V/div
1000mA 500mA 0
ILM 500mA/div
200mA I LC 200mA/div 0 VCORE (AC-COUPLED) 20mV/div 1s/div
VMAIN (AC-COUPLED) 20mV/div 1s/div
CORE SWITCHING WAVEFORMS, HEAVY LOAD (500mA)
MAX1775 toc08
MAIN LINE-TRANSIENT RESPONSE (5V TO 12V)
4V LXC 2V/div 12V 0 5V VCORE (AC-COUPLED) 20mV/div 0 VIN
MAX1775 toc09
500mA ILC 250mA/div 0 2s/div 100s/div
VMAIN 50mV/div
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7
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VMAIN = +3.3V, VCORE = +1.8V, TA = +25C, unless otherwise noted.)
CORE LINE-TRANSIENT RESPONSE (3.3V TO 5V)
MAX1775 toc10
MAIN LOAD TRANSIENT (LOAD FROM 100mA to 1A, VIN = 5V)
MAX1775 toc11
5V VINC 1V/div 3.3V 100mA
1A IMAIN 0
VMAIN 50mV/div VCORE 50mV/div 100s/div 200s/div
MAIN LOAD TRANSIENT (IN DROPOUT LOAD FROM 50mA TO 500mA)
MAX1775 toc12
TURN-ON RESPONSE (CIRCUIT OF FIGURE 4), NO LOAD
MAX1775 toc13
5V 400mA IMAIN 200mA 0 0 3V VMAIN 2V 1V 0 VMAIN 50mV/div 400mA IIN 200mA 0mA 200s/div 100s/div VCORE SHDNM
8
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
Pin Description
PIN 1 2 3 4 NAME SHDNM SHDNC PGND NDRV FUNCTION Shutdown for Main Regulator. A low voltage on SHDNM shuts off the main output. For normal operation, connect SHDNM to IN. Shutdown for Core Regulator. A low voltage on SHDNC shuts off the core output. For normal operation, connect SHDNC to CVL. Power Ground. Ground for NDRV and core output synchronous rectifier. Connect all grounds together close to the IC. N-Channel Drive Output. Drives the main output synchronous rectifier MOSFET. NDRV swings between CVL and PGND. Low-Side Regulator Bypass. CVL is the output of an internal LDO regulator. This is the internal power supply for the device control circuitry as well as the N-channel driver. Bypass CVL with a 1.0F or greater capacitor to GND. When CS- is above the CVL switchover threshold (2.47V), CVL is powered from the main output. Power Supply Input P-Channel Drive Output. Drives the main output high-side MOSFET switch. PDRV swings between IN and CVH. The voltage at CVH is regulated at VIN - 4.3V unless the input voltage is less than 5.5V. High-Side Drive Bypass. CVH is the output of an internal LDO regulator with respect to VIN. This is the low-side of the P-channel driver output. Bypass with a 1.0F capacitor or greater to IN. When the input voltage is less than +5.5V, CVH is switched to PGND. Reference Voltage Output. Bypass REF to GND with a 0.22F or greater capacitor. Main Output Feedback. Connect FBM to a resistive voltage-divider to set main output voltage between +1.25V to +5.5V. Main Regulator High-Side Current-Sense Input. Connect the sense resistor between CS+ and CS-. This voltage is used to set the current limit and to turn off the synchronous rectifier when the inductor current approaches zero. Main Regulator Low-Side Current-Sense Input. Connect CS- to the main output. Core Output Feedback. Connect FBC to a resistive voltage-divider to set core output between +1.0V to +5.0V. Analog Ground Core Supply Input Core Converter Switching Node
MAX1775
5
CVL
6 7
IN PDRV
8 9 10
CVH REF FBM
11 12 13 14 15 16
CS+ CSFBC GND INC LXC
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9
Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
IN 2.7V TO 5.5V C1 1F 15 M1 7 LM 5H C6 10F R1 33m MAIN 3.3V 2A R2 M2 C4 47F
6 IN ON ON OFF OFF 1 2 SHDNM
8
CVH INC PDRV
SHDNC NDRV 4
5 CVL C2 1F 9 C3 0.22F REF
MAX1775 CS+ 11
CSFBM 3 PGND 14 GND LXC 12 10 16 LC 5.4H CORE C5 1.8V 22F 1.5A R3
R4 FBC 13 R5
Figure 1. Typical Application Circuit (Low Input Voltage)
Detailed Description
The MAX1775 dual step-down DC-DC converter is designed to power PDA, palmtop, and subnotebook computers. Normally, these devices need two separate power supplies--one for the processor and another higher voltage supply for the peripheral circuitry. The MAX1775 provides an adjustable +1.25V to +5.5V main output designed to power the peripheral circuitry of PDAs and similar devices. The main output delivers over 2A output current. The lower voltage core converter has an adjustable +1.0V to +5.0V output, providing up to 1.5A output current. Both regulators utilize a proprietary regulation scheme, allowing PWM operation at medium to heavy loads, and automatically switch to pulse skipping at light loads for improved efficiency. Figure 1 is the typical application circuit.
capacitance, due to the residual energy trapped in the core when the rectifier MOSFET turns off. This does not degrade the circuit performance. When delivering medium-to-high output currents, the MAX1775 operates in PWM continuous-conduction mode. In this mode, current always flows through the inductor and never ramps to zero. The control circuit adjusts the switch duty cycle to maintain regulation without exceeding the peak switching current set by the current-sense resistor.
100% Duty Cycle and Dropout
The MAX1775 operates with a duty cycle up to 100%. This feature extends the input voltage range by turning the MOSFET on continuously when the supply voltage approaches the output voltage. This services the load when conventional switching regulators with less than 100% duty cycle would fail. Dropout voltage is defined as the difference between the input and output voltages when the input is low enough for the output to drop out of regulation. Dropout depends on the MOSFET drain-to-source on-resistance, current-sense resistor, and inductor series resistance, and is proportional to the load current: Dropout voltage = IOUT [RDS(ON) + RSENSE + RINDUCTOR]
Operating Modes for the Step-Down Converters
When delivering low output currents, the MAX1775 operates in discontinuous conduction mode. Current through the inductor starts at zero, rises above the minimum current limit, then ramps down to zero during each cycle (see Typical Operating Characteristics). The switch waveform may exhibit ringing, which occurs at the resonant frequency of the inductor and stray
10
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
TOFFMIN VMIN CS+ CSVVALLEY FB VREF R NON VO NSW S Q TONMIN PON PON VIN PSW
VCLM
S
Q
R VZERO NONOVERLAP PROTECTION
Figure 2. Simplified Control System Block Diagram
Regulation Control Scheme
The MAX1775 has a unique operating scheme that allows PWM operation at medium and high current, with automatic switching to pulse-skipping mode at lower currents to improve light-load efficiency. Figure 2 shows a simplified block diagram. Under medium- and heavy-load operation, the inductor current is continuous and the part operates in PWM mode. In this mode, the switching frequency is set by either the minimum on-time or the minimum off-time, depending on the duty cycle. The duty cycle is approximately the output voltage divided by the input voltage. If the duty cycle is less than 50%, the minimum on-time controls the frequency; and the frequency is approximately f 2.5MHz D, where D is the duty cycle. If the duty cycle is greater than 50%, the minimum off-time sets the frequency; and the frequency is approximately f 2.5MHz (1 - D). In both cases, the voltage is regulated by the error comparator. For low duty cycles (<50%), the P-channel MOSFET turns on for the minimum on-time, causing fixed-on-time operation. During the P-channel MOSFET on-time, the output voltage rises. Once the P-channel MOSFET turns off, the voltage drops to the regulation threshold, at which time another cycle is initiated. For high duty cycles (>50%), the P-channel MOSFET remains off for the minimum off-time, causing fixed offtime operation. In this case, the P-channel MOSFET remains on until the output voltage rises to the regulation threshold. Then the P-channel MOSFET turns off for the minimum off-time, initiating another cycle.
By switching between fixed on-time and fixed off-time operation, the MAX1775 can operate at high input-output ratios, yet still operate up to 100% duty cycle for low dropout. Note that when operating in fixed on-time, the minimum output voltage is regulated; but in fixed off-time operation, the maximum output voltage is regulated. Thus, as the input voltage drops below approximately twice the output voltage, a decrease in line regulation can be expected. The drop in voltage is approximately VDROP VRIPPLE. At light output loads, the inductor current is discontinuous, causing the MAX1775 to operate at lower frequencies, reducing the MOSFET gate drive and switching losses. In discontinuous mode, under most circumstances, the on-time will be a fixed minimum of 400ns. The MAX1775 features four separate current-limit threshold detectors and a watchdog timer for each of its step-down converters. In addition to the more common peak current detector and zero crossing detector, each converter also provides a valley current detector (IVALLEY) and a minimum current detector (IMIN). IVALLEY is used to force the inductor current to drop to a lower level after hitting peak current before allowing the Pchannel MOSFET to turn on. This is a safeguard against inductor current significantly overshooting above the peak current when the inductor discharges too slowly when VOUT/L is small. IMIN is useful in ensuring that a minimum current is built up in the inductor before turning off the P-channel MOSFET. This helps the inductor to charge the output near dropout when dI/dt is small (because (VIN - VOUT) / L is small) to avoid multiple
11
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
MAIN CSOUT CS+
MAX1775
CVH
sumption by limiting the amount of injected gate charge (see Internal Linear Regulators). The main current limit is sensed through a small sense resistor at the converter output (see Setting the Current Limit). Driving SHDNM low puts the main converter in a low-power shutdown mode. The core regulator is still functional when the main converter is in shutdown.
CS- CS+ CVL
IN PDRV
Core Step-Down Converter
The core step-down converter produces a +1.0V to +5.0V output from a +2.6V to +5.5V input. The low-voltage input allows the use of internal power MOSFETs, taking advantage of their low RDS(ON), improving efficiency and reducing board space. Like the main converter, the core regulator makes use of an N-channel MOSFET synchronous rectifier, improving efficiency and eliminating the need for an external Schottky diode. Current sensing is internal to the device, eliminating the need for an external sense resistor. The maximum and minimum current limits are sensed through the P-channel MOSFET, while the valley current and zero crossing current are sensed through the N-channel MOSFET. The core output voltage is measured at FBC through a resistive voltagedivider. This divider can be adjusted to set the output voltage level (see Setting the Output Voltages). The core input can be supplied from the main regulator or an external supply that does not exceed +5.5V (see HighVoltage Configuration and Low-Voltage Configuration). The core converter can be shut down independent of the main converter by driving SHDNC low. If the main converter output is supplying power to the core and is shut down, SHDNM controls both outputs. Figure 3 is a simplified block diagram.
REF
REF
CVL
MAIN BUCK FB ON
CVH NDRV
SOFTSTART SHDNM SHDNC
PGND
ON
INC
CORE BUCK
LXC
FB
PGNDC GND
FBM
FBC
Figure 3. Simplified Block Diagram
Internal Linear Regulators
There are two linear regulators internal to the MAX1775. A high-voltage linear regulator accepts inputs up to +28V, reducing it to +2.8V at CVL to provide power to the MAX1775. Once the voltage at CS- reaches +2.47V, CVL is switched to CS, allowing it to be driven from the main converter, improving efficiency. CVL supplies the internal bias to the IC and power for the NDRV gate driver. The CVH regulator provides the low-side voltage for the main regulator's PDRV output. The voltage at CVH is regulated at 4.3V below VIN to limit the voltage swing on PDRV, reducing gate charge and improving efficiency (Figure 3).
pulses and low efficiency. This feature, however, is disabled during dropout and light-load conditions where the inductor current may take too long to reach the IMIN value. A watchdog timer overrides IMIN after the Pchannel MOSFET has been on for longer than about 10s.
Main Step-Down Converter
The main step-down converter features adjustable +1.25V to +5.5V output, delivering over 2A from a +2.7V to +28V input (see Setting the Output Voltages). The use of external MOSFETs and a current-sense resistor maximizes design flexibility. The MAX1775 offers a synchronous rectifier MOSFET driver that improves efficiency by eliminating losses through a diode. The two MOSFET drive outputs, PDRV and NDRV, control these external MOSFETs. The output swing of these outputs is limited to reduce power con12
Reference
The MAX1775 has an accurate internally trimmed +1.25V reference at REF. REF can source no more than 50A. Bypass REF to GND with a 0.22F capacitor.
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
IN 2.7V TO 28V C1 1F M1 7 C6 10F R1 33m LM 10H M2 12 CS15 INC 10 FBM CS+ 11 MAIN 3.3V 2A R2 C4 47F
6 IN ON ON OFF OFF 1 2 SHDNM SHDNC
8 CVH
PDRV
NDRV 5 CVL
4
C2 1F C3 0.22F
MAX1775
9
REF
3 PGND 14 GND
LC 16 5.4H LXC R4 FBC 13 R5
CORE C5 1.8V 22F 1.5A
R3
Figure 4. High Input Voltage Cascaded Configuration
Design Procedure
Low-Voltage Configuration
To improve efficiency and conserve board space, the core regulator operates from low input voltages, taking advantage of internal low-voltage, low-on-resistance MOSFETs. When the input voltage remains below 5.5V, run the core converter directly from the input by connecting INC to IN (Figure 1). This configuration takes advantage of the core's low-voltage design and improves efficiency.
age-divider to FBM (Figure 1). Resistor values can be calculated by the following equation: R2 = R3 [(VOUTM / VFBM) - 1] where VFBM = +1.25V. Choose R3 to be 40k or less. The core regulator output is adjustable from +1.0V to +5.0V through two external resistors connected as a voltage-divider to FBC (Figure 1). Resistor values can be calculated through the following equation: R4 = R5 [(VOUTC / VFBC) - 1] where VFBC = +1.0V. Choose R5 to be 30k or less.
High-Voltage Configuration
For input voltages greater than 5.5V, cascade the main and core converters by connecting INC to the main output voltage. In this configuration (Figure 4), the core converter is powered from the main output. Ensure that the main output can simultaneously supply its load and the core input current. In this configuration, the main output voltage must be set above the 2.6V minimum input voltage of the core converter.
Setting the Current Limit
The main regulator current limit is set externally through a small current-sense resistor, R1 (Figure 1). The value of R1 can be calculated by the following equation: VCLM R1 = 1.3 IOUT
(
)
Setting the Output Voltages
The main output voltage may be set from +2.6V and +5.5V with two external resistors connected as a volt-
where VCLM = 80mV is the current-sense threshold, and IOUT is the current delivered to the output. The core converter current limit is set internally and cannot be modified.
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers MAX1775
Careful layout of the current-sense signal traces is imperative. Place R1 as close to the MAX1775 as possible. The two traces should have matching length and width, be as far as possible from noisy switching signals, and be close together to improve noise rejection. These traces should be used for current-sense signal routing only and should not carry any load current. Refer to the MAX1775 Evaluation Kit for layout examples. For ceramic capacitors, the ripple is mostly due to the capacitance. The ripple due to the capacitance is approximately: VRIPPLE,C L IRIPPLE2 / 2COUTVOUT where VOUT is the average output voltage. From this equation, estimate the output capacitor values for given voltage ripple as follows: COUT = 1/2 L IRIPPLE2 / (VRIPPLE,COUT VOUT) This equation is suitable for initial capacitor selection. Final values should be set by testing a prototype or evaluation kit. When using tantalum capacitors, use good soldering practices to prevent excessive heat from damaging the devices and increasing their ESR. Also, ensure that the tantalum capacitors' surge-current ratings exceed the startup inrush and peak switching currents. The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple at IN, caused by the circuit's switching. Use a low-ESR capacitor. Two smaller-value low-ESR capacitors can be connected in parallel if necessary. Choose input capacitors with working voltage ratings higher than the maximum input voltage. Typically 4F of input capacitance for every 1A of load current is sufficient. More capacitance may improve battery life and noise immunity. Place a surface-mount ceramic capacitor at IN very close to the source of the high-side P-channel MOSFET. This capacitor bypasses the MAX1775, minimizing the effects of spikes and ringing on the MAX1775's operation. Bypass REF with 0.22F or greater. Place this capacitor within 0.2in (5mm) of the IC, next to REF, with a direct trace to GND.
Inductor Selection
The essential parameters for inductor selection are inductance and current rating. The MAX1775 operates with a wide range of inductance values. Calculate the inductance value for either core or main, LMIN: LMIN = (VIN - VOUT) TONMIN / IRIPPLE where TONMIN is typically 400ns, and IRIPPLE is the continuous conduction ripple current. In continuous conduction, IRIPPLE should be chosen to be 30% of the maximum load current. With high inductor values, the MAX1775 begins continuous-conduction operation at a lower fraction of full load (see Detailed Description). The inductor's saturation current must be greater than the peak switching current to prevent core saturation. Saturation occurs when the inductor's magnetic flux density reaches the maximum level the core can support, and inductance starts to fall. The inductor heating current rating must be greater than the maximum load current to prevent overheating. For optimum efficiency, the inductor series resistance should be less than the current-sense resistance.
Capacitor Selection
Choose output filter capacitors to service the output ripple current with acceptable voltage ripple. ESR in the output capacitor is a major contributor to output ripple. For the main converter, low-ESR capacitors such as polymer, ceramic, or even tantalum are recommended. For the core converter, choosing a low-ESR tantalum capacitor with enough ESR to generate about 1% ripple voltage across the output is helpful in ensuring stability. Voltage ripple is the sum of contributions from ESR and the capacitor value: VRIPPLE VRIPPLE,ESR + VRIPPLE,C For tantalum capacitors, the ripple is determined mostly by the ESR. Voltage ripple due to ESR is: VRIPPLE,ESR RESR IRIPPLE
MOSFET Selection
The MAX1775 drives an external enhancement-mode P-channel MOSFET and a synchronous-rectifier Nchannel MOSFET. When selecting the MOSFETs, important parameters to consider are on-resistance (R DS(ON) ), maximum drain-to-source voltage (V DS(MAX) ), maximum gate-to-source voltage (VGS(MAX)), and minimum threshold voltage (VTH(MIN)).
Chip Information
TRANSISTOR COUNT: 3530 PROCESS: BiCMOS
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Dual-Output Step-Down DC-DC Converter for PDA/Palmtop Computers
Package Information
QSOP.EPS
MAX1775
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Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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